I. Field of the Disclosure
The technology of the disclosure relates generally to memory management, and, in particular, to managing heterogeneous memory systems.
II. Background
A heterogeneous memory system is a memory system of a processor-based system that incorporates two or more different types of memory having comparatively different performance characteristics (e.g., capacity, bandwidth, access latency, power consumption, and/or the like). As non-limiting examples, a heterogeneous memory system may include a high-bandwidth memory (HBM) that provides atypically wide communication lanes, along with a dynamic random access memory (DRAM) that provides conventionally sized communication lanes. Other aspects of a heterogeneous memory system may include DRAM and phase-change memory, DRAM and a Level 3 (L3) cache on a processor die, and/or other combinations of different memory types known in the art.
Conventional heterogeneous memory systems may present limited options with respect to memory management. In some aspects, memory of one type (e.g., HBM) may be configured to act as a cache for an entire memory address space of the heterogeneous memory system. Such aspects are relatively simple and easy to deploy, and may be transparently managed by hardware. However, because all decisions regarding the placement of data or allocation of memory are handled by hardware, no software input or influence on data placement or allocation memory is utilized.
Alternatively, the heterogeneous memory system may employ disjoint address regions, and may allow dynamic memory management and reallocation operations to be performed by software instead of hardware. This approach is often preferable to exclusive hardware control, as software may have access to data (e.g., workload, program semantics, and/or relative priorities) that is relevant to memory allocation, but that cannot be accessed or transparently inferred by hardware. However, such dynamic memory management may require extremely complex data migration decisions, and software capable of managing such decisions, along with other necessary processor- and time-expensive operations, which may be difficult to develop and maintain. Thus, a memory management mechanism that provides hardware support and software control for flexible management of heterogeneous memory systems is desirable.